The present invention relates to semiconductor storage devices and electronic equipment and, more particularly, to a semiconductor storage device, as well as electronic equipment using the device, which includes nonvolatile memory cells such as flash memory cells or mask ROM (read-only memory) cells.
Recently, nonvolatile memories such as flash memory, ferroelectric memory and mask ROM have been widely used as semiconductor storage devices for use of data storage or code storage in portable telephones and digital cameras. Also, capacity increases for increasing the storage capacity has been going on and on more than ever.
In these semiconductor storage devices, in which cell currents flowing through memory cells are changed to store data, even for memory cells having identical data stored therein, it is difficult to make their individual cell currents fully coincident with one another. Therefore, it is the usual case that even if a plurality of memory cells have stored identical information therein, values of the cell currents are distributed with some degree of width. However, since overlaps of cell current distributions among different data would incur a difficulty in correctly deciding data, verify operation is performed together with write operation or erase operation so that those respective distributions are not overlapped with one another. While, it is today's trend that gaps separating the distributions of cell currents from one another have been narrowing more and more along with advancing scale-down, voltage lowering, multi-valuing and the like.
Also, influences of disturb (external disturbance due to access to other memory cells) or endurance (deterioration of rewrite characteristic of memory cells due to increases in number of rewrite operations), retention (retaining characteristic of stored information against temperature changes, time variation, etc.) or the like differ from memory cell to memory cell. This causes a problem that even memory cells connecting to one word line differ in distribution state of cell current values from one another, giving rise to positional differences of gap regions that separate the distributions of cell currents according to different data from one another.
As a solution to these and other problems, there has conventionally been proposed a semiconductor storage device in which, with a plurality of special memory cells called reference cells provided for each word line, their current value or average current value is taken as a reference value and compared with a cell-current value of a memory cell to be read to decide data (see, e.g., JP 2004-273093 A). In this semiconductor storage device, two types of reference cells are connected to a word line, those reference cells being set to data 0 and data 1, respectively, and an average current value of the reference cells is used as the reference value. Further, taking into consideration that cell current values vary due to disturbs, distributions of cell current values of the individual memory cells are determined while the verify operation in writing is performed, and based on the determined distributions of cell current values, the cell current values of the reference cells are reset.
However, in this conventional semiconductor storage device, since a plurality of reference cells are provided for each word line, there is a problem that the chip area increases to a large extent. Further, in this conventional semiconductor storage device, since disturb is influential until the verify operation in writing is performed, there is a difficulty in making a decision as to how long intervals the verify operation should be done at. Moreover, this semiconductor storage device has a problem that extra time is required to re-set the cell current values of the reference cells.